NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model | Paper Summaries

Context

This note summarizes an approach for improving both placement-stage routability prediction and routing-stage pin allocation during standard-cell synthesis in advanced nodes.
The main focus is the difficulty of simultaneously achieving routability, LVS/DRC-clean results, and good pin assignment for hard cells under reduced routing tracks and complex design rules.

This paper argues that NVCell 2 can greatly improve the success rate of advanced-node standard-cell synthesis by combining routability-aware placement metrics with routing-time dynamic pin allocation.
The key idea is to predict routability more accurately during placement and then optimize external pins during routing instead of fixing them in advance.
In the reported results, NVCell 2 substantially increases the number of routable and LVS/DRC-clean cells versus the previous NVCell on a set of 94 complex hard-to-route cells, and it also reports a very high clean-generation ratio on an industrial library.

At 5nm and below, fewer routing tracks and more complex patterning/design-rule constraints make it hard for standard-cell synthesis to obtain real routing and signoff-clean results even when area targets are met.
This paper therefore shows why placement quality and pin assignment need to be connected through the lens of routability in standard-cell generation.

First, a PDA (Pin Density Aware) congestion metric estimates local routing difficulty.
A lattice-graph-based routability model then predicts column-level horizontal congestion and routability probability, which are converted into a cell-level routability score.
During routing, dynamic external pin allocation determines pin shapes and locations jointly from routability and design-rule perspectives.
Finally, BOHB-based multi-objective tuning adjusts trade-offs among cell width/area, wirelength, and routability.

Using the lattice-graph model increases placement runtime by an average of 4.33x, so the cost of improved routability prediction is not small.
The main hard-cell evaluation depends heavily on 94 complex cells and a specific industrial library/node, so broader generalization should be interpreted carefully.
Some numeric claims need to be read benchmark by benchmark; library-wide results and the 94-cell benchmark should not be conflated.

Compared with [[Knowledge/Paper Reviews/SO3-Cell: Standard Cell Layout Automation Framework for Simultaneous Optimization of Topology, Placement, and Routing]], NVCell 2 emphasizes routability estimation and pin allocation, while SO3-Cell emphasizes joint topology-placement-routing optimization.
It would be useful to check whether GNN-based routability models repeatedly appear in advanced-node standard-cell automation.

SO3-Cell: Standard Cell Layout Automation Framework for Simultaneous Optimization of Topology, Placement, and Routing